000 02323nam a22001937a 4500
005 20250108142639.0
008 250108b |||||||| |||| 00| 0 eng d
020 _a9781523364022
040 _cNational Institute of Technology Goa
082 _a621.395
_bTHO/LOG
100 _aThomas, Donald
245 _aLogic design and verification using systemVerilog (revised)
250 _a1st
260 _a USA:
_b CreateSpace Independent Publishing,
_c 2016
300 _axxii, 314p.: 15x20x1; Paperback
520 _aAbout the book: SystemVerilog is a Hardware Description Language that enables designers to work at the higher levels of logic design abstractions that match the increased complexity of current day integrated circuit and field-programmable gate array (FPGA) designs. The majority of the book assumes a basic background in logic design and software programming concepts. It is directed at: -students currently in an introductory logic design course that also teaches SystemVerilog, -designers who want to update their skills from Verilog or VHDL, and -students in VLSI design and advanced logic design courses that include verification as well as design topics. The book starts with a tutorial introduction on hardware description languages and simulation. It proceeds to the register-transfer design topics of combinational and finite state machine (FSM) design - these mirror the topics of introductory logic design courses. The book covers the design of FSM-datapath designs and their interfaces, including SystemVerilog interfaces. Then it covers the more advanced topics of writing testbenches including using assertions and functional coverage. A comprehensive index provides easy access to the book's topics.The goal of the book is to introduce the broad spectrum of features in the language in a way that complements introductory and advanced logic design and verification courses, and then provides a basis for further learning.Solutions to problems at the end of chapters, and text copies of the SystemVerilog examples are available from the author as described in the Preface.
650 _2Electronic and Communication Engineering;
_aElectronic and Communication Engineering; Combinational logic; Finite state machines; Hardware threads; Testbenches; Simulation Kernel; FPGA
942 _2ddc
_cBK
_n0
999 _c5225
_d5225