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Analysis and design of resilient VLSI circuits: mitigating soft errors and process variations (Record no. 4254)

MARC details
000 -LEADER
fixed length control field 00492nam a2200157Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230911s9999||||xx |||||||||||||| ||und||
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781441909305
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.395 GAR/KHA
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Garg, Rajesh
245 #0 - TITLE STATEMENT
Title Analysis and design of resilient VLSI circuits: mitigating soft errors and process variations
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. Heildelberg
Name of publisher, distributor, etc. Springer
Date of publication, distribution, etc. 2010
300 ## - PHYSICAL DESCRIPTION
Extent 212
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element ELECTRONICS AND COMMUNICATION ENGINEERING
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Garg, RajeshKhatri, Sunil P
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Books
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Home library Current library Shelving location Date acquired Source of acquisition Cost, normal purchase price Total checkouts Full call number Barcode Date last seen Price effective from Koha item type Public note
    Dewey Decimal Classification     Central Library NIT Goa Central Library NIT Goa General stacks 30/04/2015 Sunil Book Service, 7853.00   621.395 GAR/KHA 6554 12/09/2023 12/09/2023 Reference Reference Book Case number 02
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